Location:
Search - image vhdl
Search list
Description: This project features a complete JPEG Hardware Compressor (standard Baseline DCT, JFIF header) with 2:1:1 subsampling, able to compress at a rate of up to 24 images per second (on XC2V1000-4 @ 40 MHz with resolution 352x288).
Image resolution is not limited. It takes an RGB input (row-wise) and outputs to a memory the compressed JPEG image. Its quality is comparable to software solutions.
Platform: |
Size: 3416064 |
Author: Bill Guan |
Hits:
Description: 介绍epm570在信号采集时候的一个例子，是给予图像采集中的作用，很使用的一个例子。-Introduction epm570 signal acquisition at the time of an example are given to the role of image acquisition, it is used in a case in point.
Platform: |
Size: 82944 |
Author: 王立新 |
Hits:
Description: 这个是一个基于FPGA的数字图像的整数DCT变换程序，程序高性能地实现了2维DCT变换。-This is an FPGA-based digital image of the integer DCT transform process and procedures to achieve high-performance 2-D DCT transform.
Platform: |
Size: 418816 |
Author: jyb |
Hits:
Description: golomb编码，用于无损图像压缩等，基于quartusii平台。-golomb coding for lossless image compression, based on the platform quartusii.
Platform: |
Size: 151552 |
Author: Tangyao |
Hits:
Description: 用VHDL实现视频控制程序(实现对图像的采集和压缩)-Using VHDL video control procedures (the achievement of the image acquisition and compression)
Platform: |
Size: 421888 |
Author: huangya |
Hits:
Description: 采用快速中指滤波算法实现图像的中值滤波，使用VHDL语言ISE环境-Image Median Filter
Platform: |
Size: 12288 |
Author: 若谙 |
Hits:
Description: 图像数据的采集和处理，并通过串口发送到PC界面进行整理。-Image data acquisition and processing, and sent to the PC through the serial interface to collate.
Platform: |
Size: 6144 |
Author: 魏常伟 |
Hits:
Description: 一个基于FPGA和CCD的视觉处理硬件平台项目开发文档-The design is a first step towards a
hardware implementation of the super-resolution algorithms and other multimedia projects.The design presented in this paper may be used as a platform for many multimedia and image processing projects.
Platform: |
Size: 483328 |
Author: neversee |
Hits:
Description: 应用不同的用户可选择回旋滤波器的图像处理部件。一套PC应用程序将图像档案下载到一个FPGA可访问的存储器阵列。处理过的图像显示在连接的VGA显示屏上。 -Users can choose to apply a different room of the image processing filter components. A set of PC applications will be image files downloaded to a FPGA can access the memory array. Processed image displayed on the VGA display connection.
Platform: |
Size: 15406080 |
Author: chenlunhai |
Hits:
Description: 一个用vHDL语言编的同步程序，对图像处理人员有帮助哦-VHDL language used for a synchronization process, the image processing staff helpful Oh
Platform: |
Size: 208896 |
Author: yamaxun |
Hits:
Description: 本项目名称是：基于FPGA的指纹识别模块设计。
主要内容为：本模块采用xilinx公司的Spartan 3E系列XC3S500E
型FPGA作为核心控制芯片，通过富士通公司的MFS300滑动式电容指纹传感器对指纹图象进行提取，然后对提取的指纹图像进行灰度滤波、图像增强、二值化、二值去噪、细化等预处理，得到清晰的指纹图象，再从清晰的指纹图象中提取指纹特征点，存入外部FLASH作为建档模板。指纹比对时，采用同样的方法获得清晰的指纹图像，建立比对模板，然后将比对模板与建档模板利用点模式匹配算法进行比对，得出比对结果。该模块利用嵌入式软核实现系统的管理，利用硬件实现指纹识别，保证了系统功能的完整性与识别的正确性。该识别模块可用于门禁、考勤、安检、保险箱柜等很多方面，也可和计算机等设备联机使用，满足各个方面的不同需求，因此它的设计具有很广泛的应用前景和市场价值。
-The project name is: FPGA-based fingerprint identification module design.
The main contents are: the use of this module xilinx s Spartan 3E Series XC3S500E
FPGA-based control chip as the core, through the MFS300 Fujitsu fingerprint slide sensor capacitance extraction of the fingerprint image, and then extracted gray-scale fingerprint image filtering, image enhancement, binarization, denoising Second, refinement, etc. pre-treatment have been given clear fingerprint image, and then a clear fingerprint image from the extracted fingerprint feature points, into the external FLASH file as a template. Fingerprint matching using the same method to obtain a clear image of the fingerprint to establish than the template, and then will be the template file templates and the use of point pattern matching algorithm than the right, than the results obtained. The module is the realization of the use of soft-core embedded system management, the use of fingerprint recognition hardware implementation
Platform: |
Size: 191488 |
Author: xiaoxu |
Hits:
Description: Simple LZW image compression implemented on Spartan-3e starter kit using Xilinx9.2 and Modelsim for testbench simulation.
Platform: |
Size: 198656 |
Author: amrabbas |
Hits:
Description: minimum uart Image for transfer image to FPGA then read again by PC
Platform: |
Size: 409600 |
Author: umar |
Hits:
Description: JPEG标准中图像彩色空间的转换，开发语言为Verilog-Standard JPEG image color space conversion, the development of language for Verilog
Platform: |
Size: 2048 |
Author: 卫立波 |
Hits:
Description: 使用Verilog控制美光CMOS图像处理器，并转存到SDRAM中。使用FPGA为QL的带fuse系列-Control the use of Verilog Micron CMOS image processor and SDRAM in转存到. FPGA for use with QL series fuse
Platform: |
Size: 36864 |
Author: NOOW |
Hits:
Description: 本代码为富士通MV86S02的CMOS图像传感器的VHDL驱动代码-The code for Fujitsu MV86S02 the CMOS image sensor-driven VHDL code
Platform: |
Size: 139264 |
Author: 王志杰 |
Hits:
Description: matlab编写的交互式image matting程序，包括：Poisson，Hillman，Ruzon等方法和源图像-matlab interactive image matting procedures, including: Poisson, Hillman, Ruzon methods and sources image
Platform: |
Size: 2227200 |
Author: andrew |
Hits:
Description: 对ccd图像进行解码采集，并通过VGA输出-Ccd image decoding of the collection, and through the VGA output
Platform: |
Size: 3072 |
Author: charles |
Hits:
Description: this document is about image processing in vhdl
Platform: |
Size: 5120 |
Author: Manikandan |
Hits:
Description: 基于FPGA的实验。使用FPGA直接控制TFT彩屏，达到显示彩条的效果。使用FPGA连接TFT控制器，使显示一组汉字或一幅图像。
-FPGA-based experiment. FPGA to directly control the use of TFT color display to show the effect of color. TFT controller using FPGA connected to a group of Chinese characters displayed or an image.
Platform: |
Size: 1024 |
Author: 贺欧 |
Hits: